Engineer, ASIC Design
Here is our Story
Who we are
Kinara is a Bay Area-based venture backed company. Our architecture is based on research done at Stanford University by Rehan Hameed and Wajahat Qadeer under the guidance of legendary Prof. Mark Horowitz (http://www-vlsi.stanford.edu/~horowitz/) and Prof. Christos Kozyrakis (http://csl.stanford.edu/~christos/).
What we do
Our game-changing AI solutions revolutionize what people and businesses can achieve. Ara inference processors combined with our SDK deliver unrivaled deep learning performance at the edge to accelerate and optimize real-time decision making where every millisecond is critical, and power efficiency is a must. Kinara solutions embed high-performance AI into edge devices to create a smarter, safer, and more enjoyable world. Edge AI is on the brink of a boom, and Kinara is looking forward to playing a significant role in it.
This is what you are responsible for
- Micro-architect and design modules and subsystems,
- Design using formal tools i.e., model checking using formal tools
- Implement design by performing synthesis, timing closure, lint, CDC, UPF
- Participate in FPGA emulation, FPGA and silicon bring up
Preferred qualifications but not necessary
- Experience with RTL development, Synthesis, Timing analysis, power analysis
- Exposure to FPGA emulation platforms, silicon bring up, board debug
- Proficient with EDA tools, Python and Tcl
- Knowledge of formal methods
- BTech/MTech in EE/CS with any level of experience
We at Kinara have an environment that fosters innovation. Our team has technology experts who understand the big picture and mentors who coach passionate professionals to work on the most exciting challenges. We share responsibilities in everything we do, where every point of view is valued. Join us!
Now tell us your story. We are looking forward to reviewing your application.
Make your mark!