Who we are

Kinara is a Bay Area-based venture backed company. Our architecture is based on research done at Stanford University by Rehan Hameed and Wajahat Qadeer under the guidance of legendary Prof. Mark Horowitz (http://www-vlsi.stanford.edu/~horowitz/) and Prof. Christos Kozyrakis (http://csl.stanford.edu/~christos/).

What we do

Our game-changing AI solutions revolutionize what people and businesses can achieve. Ara inference processors combined with our SDK deliver unrivaled deep learning performance at the edge to accelerate and optimize real-time decision making where every millisecond is critical, and power efficiency is a must. Kinara solutions embed high-performance AI into edge devices to create a smarter, safer, and more enjoyable world. Edge AI is on the brink of a boom, and Kinara is looking forward to playing a significant role in it.

This is what you are responsible for

• Develop verification environments for modules, subsystems, top level and FPGA
• Build models, checkers and random test frameworks using SystemVerilog and UVM
• Participate in Low power analysis (UPF), power estimation, C modeling
• Perform lint, CDC, code coverage, functional coverage
• Formal verification of modules using SVA assertions

Necessary qualifications

• Experience in verifying complex subsystems and ASICs
• Experience with building scalable verification environments from scratch
• Proficient at Verilog, UVM, EDA tools, scripting, automation, build, regression systems etc.
• Exposure to FPGA emulation platforms, silicon bringup, board debug
• BTech/MTech in EE/CS with any level of experience