Junior ASIC Verification Engineer

Overview:

We are seeking a talented junior ASIC Verification Engineer to join our dynamic team. The successful candidate will be responsible for leading and executing verification efforts for complex ASIC designs, ensuring the quality and reliability of our products.

Key Responsibilities:

• Develop and maintain verification plans, testbenches, and test cases for ASIC designs.
• Design and implement SystemVerilog/UVM-based verification environments.
• Create and execute test cases to verify functionality, performance, and compliance with specifications.
• Write testplans, testcases at unit or SOC level.

Necessary Qualifications:

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• expertise in SystemVerilog, C, C++ languages.
• Experience with verification tools such as VCS, QuestaSim, or similar is helpful.
• Excellent problem-solving and debugging skills.
• Strong communication and teamwork abilities.

Preferred Qualifications:

• Experience with scripting languages such as Python or Perl .
• Programming languages such as C,C++.
• Knowledge of industry standards and protocols (e.g., AXI, AHB, etc).
• Familiarity with formal verification techniques.

Work culture

We at Kinara have an environment that fosters innovation. Our team has technology experts who understand the big picture and mentors who coach passionate professionals to work on the most exciting challenges. We share responsibilities in everything we do, where every point of view is valued. Join us!

Now tell us your story. We are looking forward to reviewing your application.

Make your mark!